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$140.78
1. A Code Mapping Scheme for Dataflow
$118.32
2. Wave Pipelining: Theory and CMOS
 
3. Compiling for dataflow software
 
4. Pipelining peformance of structured
 
5. Specification and verification
 
6. Pipelining techniques for vector
$48.23
7. Computer Organization
 
8. Perfect pipelining: A new loop
 
9. Fault-tolerance and two-level
 
10. A study of instruction prefetching
 
11. A parallel pipelined renderer
 
12. Complexicty of Kronecker operations
 
13. The force on the flex global parallelism
 
14. Parallelization of the pipelined
 
15. Design considerations for parallel
 
16.

1. A Code Mapping Scheme for Dataflow Software Pipelining (The Springer International Series in Engineering and Computer Science)
by Guang R. Gao
Hardcover: 272 Pages (1990-12-31)
list price: US$152.00 -- used & new: US$140.78
(price subject to change: see help)
Asin: 0792391306
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2. Wave Pipelining: Theory and CMOS Implementation (The Springer International Series in Engineering and Computer Science)
by C. Thomas Gray, Wentai Liu, Ralph K. CavinIII
Hardcover: 224 Pages (1993-11-30)
list price: US$149.00 -- used & new: US$118.32
(price subject to change: see help)
Asin: 0792393988
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Editorial Review

Product Description
Wave Pipelining: Theory and CMOS Implementationprovides a coherent presentation of the theory of wave pipelinedoperation of digital circuits and discusses practical designtechniques for the realization of wave pipelined circuits in CMOStechnology.
Wave pipeling is a timing methodology used in digital systems toenhance performance while conserving the number of data registersused. This is achieved by applying new data to the inputs of acombinatorial logic block before the previous outputs are available.In contrast to conventional pipelining, system performance is limitedby differences in maximum and minimum circuit delay rather thanmaximum circuit delays. Realization of practical systems using thistechnique requires accurate system level and circuit level timinganalysis. At the system level, timing constraints identifying validregions of operation for correct clocking of wave pipelined circuitsare presented. Both single stage and multiple stage systems includingfeedback are considered.
At the circuit level, since performance is determined by the maximumcircuit delay difference, highly accurate estimates of both maximumand minimum delays are needed. Thus, timing analysis based ontraditional gate delay models is not sufficient. For CMOS circuits,data dependent delay models considering the effect of simultaneousmultiple input switchings must be used. An algorithm using these delaymodels for accurate analysis of small to medium sized circuits isimplemented in a prototype timing analyzer, XTV. Results are given fora set of benchmark circuits.
... Read more


3. Compiling for dataflow software pipelining (Technical report / McGill University. School of Computer Science)
by Guang R Gao
 Unknown Binding: 33 Pages (1989)

Asin: B0007BTJTK
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4. Pipelining peformance of structured networks (University of California, Irvine. Dept. of Information and Computer Science. Technical report)
by Frederic M Tonge
 Unknown Binding: Pages (1978)

Asin: B0006X1PEG
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5. Specification and verification of pipelining in the ARM2 RISC microprocessor (Technical report / University of Michigan, Computer Science and Engineering ... Electrical Engineering and Computer Science)
by James K Huggins
 Unknown Binding: 40 Pages (1998)

Asin: B0006RHOR4
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6. Pipelining techniques for vector reduction arithmetic (Technical report)
by Lionel M Ni
 Unknown Binding: 32 Pages (1983)

Asin: B00072AAUQ
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7. Computer Organization
by Carl Hamacher, Zvonko Vranesic, Safwat Zaky
Hardcover: 832 Pages (2001-08-02)
-- used & new: US$48.23
(price subject to change: see help)
Asin: 0072320869
Average Customer Review: 5.0 out of 5 stars
Canada | United Kingdom | Germany | France | Japan
Editorial Review

Product Description
This well-respected text for a first level course on computer organization has been thoroughly revised and updated. Computer Organization is suitable for a one-semester course in engineering or computer science programs and has a good mix if hardware- and software-oriented topics.

The goal of the book is to illustrate the principles of computer organization by using a number of extensive examples drawn from commercially available computers.The authors feel this approach motivates the students and is the most practical.The machines discussed in Hamacher et. al. are the Motorola 680X0 and 683XX families, Intel 80X86 and Pentium families, ARM family, Sun Microsystems Sparc family, and DEC(Compaq) Alpha family.The 68000, Pentium, and ARM are used as detailed examples early in the book. ... Read more

Customer Reviews (8)

5-0 out of 5 stars Lucid and Timeless
A clearly written book, which employs a simple language. Another beauty of the book is that all loose ends are tied up. As sentences unfold one will realize why a particular phrase was used earlier and so on. That makes a big difference for an engineering text book.

It is the best book that I know for fundamentals. Hence, it will be useful for years to come.

Must have for all embedded systems people.

5-0 out of 5 stars Has been there on many occasions
Helped me in my undergrad (older version). Helped me when I gave subject GRE recently. Covered Pipelining superscalar, out-of-order execution processors, caching and secondary storage, combinational and sequential ckt review etc real well. No computer architecture book covered them all so clearly, and in one book.

5-0 out of 5 stars excellent, thorough, and clear
I had a chance to recommend this to a colleague just last week. It is easily twice the price of the "competing" books on the market, but you get what you pay for. With this book plus (perhaps) a hands-on course in the microprocessor laboratory--interfacing various logic families to output devices, e.g., or whipping up a robot of limited capabilities--the student gains the ultimate understanding of what makes computer systems "tick," from the loftiest levels of software, through the details of instruction set implementation (microprogrammed control, prefetching, cycle-stealing DMA transfers) and even the detailed digital logic circuits that underlie the CPU.

I dare say the student who aces this course is all but prepared to build a simplistic CPU on his own--"simplistic" because, though the concepts can be understood quite completely, it's an intricate challenge. Notably, the book has kept pace with the times: while the PDP-11 instruction set is didactically wonderful--clear and easy and even sporting reasonable opcode mnemonics--you don't see lots of PDP or LSI (or, for that matter, VAX) minis floating around nowadays. So, HV&Z moved on to the 68000, the Power PC, perhaps even the Pentium in the latest (of five or six) editions. (Good move, gentlemen: you've actually done your homework rather than just changing "happy" to "glad" and reprinting with a new version number!)

I used this book as a junior, but (a) I went to Cooper Union, which operates at an extremely high intellectual level [let's put it this way: I took a number of graduate-level computer science electives--compilers, OS, etc.--taught by Bell Labs MTSs as a junior and senior; and some "doctoral" courses that I took at Case were--honest Injun--watered-down versions of similar courses I had taken at Cooper], and (b) I graduated more than twenty years ago, and requirements always creep downward: a few credits fewer, a few tangential courses eliminated, perhaps one fewer humanities elective necessary to matriculate, etc. By 2006 standards, I would reluctantly have to reclassify HV&Z as a postgraduate text.

(A little puzzle for the reader: we had to build--from NAND gates--a microcomputer featuring two three-bit registers, and my squad was the only one that implemented an "exchange registers" function that required only one cycle and used no auxiliary storage registers. How did we do it? Tick ... tick ... tick ... time's up! The circuitry compared corresponding bits from both registers. If they matched, it did nothing; if they differed, it flipped both! So, there was no literal "exchange" operation: rather, each was simultaneously reset to the value of the other.)

5-0 out of 5 stars Excellent undergraduate text
This was the assigned text for my junior year computer engineering course on computer organization.I loved it.The explanations areclear, progress logically, and are clearly presented.I find myself picking it up from time to time, both to read the more advanced chapters out of personal interest and to look up details needed in more advanced coursework.

5-0 out of 5 stars Excellent Book
After reading this book do not believe you'll know everyting about computing , but you'll know more than others do. ... Read more


8. Perfect pipelining: A new loop parallelization technique (Technical report. Cornell University. Dept. of Computer Science)
by Alexander Aiken
 Unknown Binding: 36 Pages (1987)

Asin: B00071DV94
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9. Fault-tolerance and two-level pipelining in VLSI systolic arrays
by H. T Kung
 Unknown Binding: 24 Pages (1983)

Asin: B0006YP8WK
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10. A study of instruction prefetching and pipelining of 8088/286/386 microprocessors (DISCS publication)
by K. T Lua
 Unknown Binding: 26 Pages (1988)

Asin: B0007BJVPW
Canada | United Kingdom | Germany | France | Japan

11. A parallel pipelined renderer for the time-varying volume data (SuDoc NAS 1.26:206275)
by Tzi-cker Chiueh
 Unknown Binding: Pages (1997)

Asin: B0001100LC
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12. Complexicty of Kronecker operations on sparse matrices with applications to the solution of Markov models (SuDoc NAS 1.26:206274)
by NASA
 Unknown Binding: Pages (1997)

Asin: B0001100GW
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13. The force on the flex global parallelism and portability (SuDoc NAS 1.26:178161)
by Harry F. Jordan
 Unknown Binding: Pages (1986)

Asin: B00010P8C4
Canada | United Kingdom | Germany | France | Japan

14. Parallelization of the pipelined Thomas algorithm (SuDoc NAS 1.26:208736)
by A. Povitsky
 Unknown Binding: Pages (1998)

Asin: B00010ZOF0
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15. Design considerations for parallel graphics libraries (SuDoc NAS 1.26:194935)
by Thomas W. Crockett
 Unknown Binding: Pages (1994)

Asin: B00010MVR4
Canada | United Kingdom | Germany | France | Japan

16.
 

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